Keynote Lecture

Toshiro Hiramoto University of Tokyo, Japan
Evolutionary Trend of Silicon Nanoelectronics and Beyond CMOS Devices

Keynote at the Arranged Session - Fluctuation, DFM, FDC, and Uniformity of Dry Process -

Richard Wise IBM, U.S.A.
Etch Process Control for Advanced Logic Development

Surface Reactions

Yasuhiro Oshima Stanford Univ., U.S.A.
GeOxNy Interfacial Layer for High-k/Ge Gate stack: Chemical States and Electrical Correlations

Mechanism Studies, Diagnostics, and Simulations

Erwin Kessels TU/e, The Netherlands
Reaction mechanisms during plasma-assisted ALD of metals and high-k oxides

Dry Process for Low-k, High-k and New Materials

Thierry Chevolleau CNRS/LTM, France
Plasma Etching Challenges for Porous SiOCH Integration in Advanced Interconnect Levels

MEMS and TSV

Fred Roozeboom NXP Semiconductors, The Netherlands
3D chip stacking technology to create cost-effective, manufacturable, stackable TSV interconnection processes (tentative)

FPD and Organic Devices

Junichi Hanna Tokyo Inst. Tech., Japan
Organic Semiconductor by Liquid Crystalline Molecules (tentative)

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